1. The local PC monitors the RI (Ring Indicate) signal via software.
2. When the remote modem wants to communicate with the local modem, it generates an RI signal. This signal is transferred by the local modem to the local PC.
3. The local PC responds to the RI signal by asserting the DTR (Data Terminal Ready) signal when it is ready to communicate.
4. After recognizing the asserted DTR signal, the modem responds by asserting DSR (Data Set Ready) after it is connected to the communications line. DSR indicates to the PC that the modem is ready to exchange further control signals with the DTE to commence communication. When DSR is asserted, the PC begins monitoring DCD for indica-tion that data is being sent over the communication line.
5. The modem asserts DCD (Data Carrier Detect) after it has received a carrier signal from the remote modem that meets the suitable signal criteria.
6. At this point data transfer can began. If the local modem has fullduplex capability, the CTS (Clear to Send) and RTS (Request to Send) signals are held in the asserted state. If the modem has only halfdu-plex capability, CTS and RTS provide the handshak-ing necessary for controlling the direction of the data flow. Data is transferred over the RD and TD sig-nals.
a. Useing the letters L for low and H for high: Say you wanted to send an ASCII 'A' (01000001). This would be the sequence:
HHHHLHLLLLLHLHHHH 1 23 4
1. The serial line idles in a high state and must be in a high state for at least 1 bit time before the start bit.
2. The start bit. Note that that it must be the opposite polarity of the idle state. It is one bit time.
3. This is the least significant bit. the other bits follow in sequence.
4. This is the stop bit. Note that it just idles the line but must be present because the line must be idle for at least 1 bit time before a start bit.
7. When the transfer of data has been completed, the PC disables the DTR signal. The modem follows by inhibiting the DSR and DCD signals. At this point the PC and modem are in the original state described in step number 1.
Looks to me like the sample code is sending (10000001)and should really be
HHHHLLHLLLLHLHHHH for ASCII 'A' (01000001).
1 2 3 4
What am I missing?
James Newton replies: The order of the bits is reversed from what you are expecting. The least significant bit is sent first. If you rearrange the order of the bits (e.g. read from right to left) you will see the correct code is being sent.+
|file: /Techref/io/serial/seq1.htm, 3KB, , updated: 2013/2/1 17:31, local time: 2023/2/4 10:17,
|©2023 These pages are served without commercial sponsorship. (No popup ads, etc...).Bandwidth abuse increases hosting cost forcing sponsorship or shutdown. This server aggressively defends against automated copying for any reason including offline viewing, duplication, etc... Please respect this requirement and DO NOT RIP THIS SITE. Questions?|
<A HREF="http://www.massmind.org/Techref/io/serial/seq1.htm"> RS232 Sequence Example.</A>
|Did you find what you needed?|
Welcome to massmind.org!
Welcome to www.massmind.org!