SX Users Manual Rev. 3.1
© 2000 Scenix Semiconductor, Inc. All rights reserved.
Chapter 3 Instruction Set
3.6.10 CLR !WDT
Clear Watchdog Timer
Clears Watchdog timer counter and prescaler counter
Z, TO, PD
0000 011f ffff
This instruction clears the Watchdog Timer counter to zero. It also clears the
Watchdog prescaler register to zero, and sets the Z, TO, and PD bits to 1 (the Zero,
Watchdog Timeout, and Power Down bits in the STATUS register).
If the Watchdog circuit is enabled, the application software must execute this
instruction periodically in order to prevent a Watchdog reset.
This example clears the Watchdog Timer counter and the Watchdog prescaler
register to zero; and sets the Z, TO, and PD bits.