On this page, I will introduce "4 bits Binary Up-Down Counter" which was written in VHDL.
This source file is written for CPLD(XC9536-PC44).
The other CPLD device can be used if arranging a little.

The logic is the function which is same as Logic IC( 74161 ) approximately.
But, a carry bit, a borrow bit aren't supported.
Those functions can be put if you arrange logic.

I programed this logic in CPLD and confirmed in the operation and had confirmed normal operation.

Source code and Explanation Fitting report Processing parameter specification

Operating state table Input Output Operation CLEAR LOAD CE UP CLK Q3,Q2,Q1,Q0 H X X X X 0,0,0,0 Counter clear L H X X D3,D2,D1,D0 Counter preset L L L X Q = Q Count stop L L H H Q = Q+1 Count up L L H L Q = Q-1 Count down H : High level L : Low level X : Don't care CLK is effective when changing into H from the L.