General tips for avoiding noise
Given a choice between your chips not agreeing on where ground is and on not agreeing on the supply voltage, its better that they agree on ground. That can help a bit with noise problems. <GRIN>
There seems to be a bit of controversy between " power isolation " vs others who say "Don't split the ground plane. Don't split the power plane either, unless it actually needs to be different voltages. PCBs@"
Bryan in 1998 made some good recommendations, including "Make sure that you have a good ground plane under anything that uses RF frequencies especially the micro controller and I/O lines. ... Some people use a split ground plane but I have had disastrous results using a split ground plane." -- "RF Noise" thread http://massmind.org/techref/postbot.asp?by=thread&id=RF+Noise
"Do not split the ground plane. Use one solid plane under both analog and digital sections of the board." -- Ott, in article "partitioning and layout of a mixed signal pcb" article by Henry W. Ott (EMI consultant) in _printed circuit design_ magazine (june 2001) http://www.hottconsultants.com/techtips/split-gnd-plane.html http://www.hottconsultants.com/pdf_files/june2001pcd_mixedsignal.pdf /* was http://www.pcdmag.com/db_area/archives/2001/06/0106_1.html */
in it he basically makes the case that split planes are generally a bad thing
their best use he says is to correct a badly laid out board after the fact and also in some cases they are needed for safety isolation
but as to localizing noise (preventing polution of low level signals) and minimizing EMI nothing beats a *properly laid out* (i.e. 'routed/placed') board with a single ground plane possessing a single net
-- recc. Dennis Saputelli 2001-06-09
"Nothing is more important to the system design of a circuit than having a solid and complete power system. ... Design the ground system to include as many parallel pathways to ground as possible. ... ground planes are optimal ..." -- Mark Glenewinkel. "Motorola Semiconductor application note AN1259: System design and layout techniques for noise reduction in MCU-base systems". 1995.
US Patent 6023202 "Ground return for high speed digital signals that are capacitively coupled across a DC-isolated interface" by Hill, Gregory A. (02/13/1998) describes the best way to capacitively couple high-speed digital signals (in general) across a galvanic isolation, and (specifically) how it applies to FireWire. "... application of the invention produces improved signal integrity, reduced generation of electromagnetic emissions, and reduced susceptibility to electromagnetic interference."
"Analog-to-Digital Converter Grounding Practices Affect System Performance" http://www.ti.com/litv/pdf/sbaa052 describes how "a single ground plane" works best. Attempting to make a "split grounds connected together at the ADC" gave worse DLE.
"Ground loops" are a badly misunderstood part of electronics.
Many op-amp data sheets recommend guard rings, such as
"When... four or more layers are used ... one plane is used as a ground plane... one layer as a power plane ... These two planes should then be placed next to each other in the middle of the board, to reduce power supply impedance and loop area. It is not a good idea to place the power and ground planes as the outer layers to act as shields. It does not work as intended, as high currents are running in the ground plane. A shield layer would have to be a second pair of ground layers."
Follow these steps to eliminate noise.
A trick I use on RF boards is to have non plated through holes included for small decoupling caps of around 100pf. I put surface mount caps (805) through the hole and solder it on the top and bottom, one of which will be the ground plane.
The values aren't too critical but bigger is not better. You want the caps to absorb well at the third harmonic of the clock. Russell McMahon says:
the ARRL handbook gives these figures for series resonance (optimum bypassing) for disk ceramics with total lead lengths of 0.5 inch.Cap uF Freq MHz 0.01 15 0.0047 22 0.002 38 0.001 55 0.0005 80 0.0001 165
You can think of the setup at this point as an irrigation system with level
ground and hoses from a big central supply bucket (the power supply cap)
to a bucket (decoupleing cap) next to each plant (chip) and a valve on the
bucket (the transisters in the chip) that allows water to flow when needed.
Draining one bucket won't effect the levels in the others and the force of
the water released (supply voltage) will not vary (much) with brief use even
if the valve is turned all the way on.
Here is a simple idea that works really well to isolate noise generating sections of a circuit from sections that need clean power - it uses just 3 diodes and 1 extra capacitor. In the common leg of a 3 terminal regulator you add a diode that raises the regulator's output voltage by the drop across the diode. You then fit 2 identical diodes to the output from the regulator to drop the voltage back down to where it would have been. Separate smoothing capacitors are then fitted to the 2 separated outputs.
|file: /Techref/noises.htm, 15KB, , updated: 2020/9/1 09:06, local time: 2023/9/27 12:29,
|©2023 These pages are served without commercial sponsorship. (No popup ads, etc...).Bandwidth abuse increases hosting cost forcing sponsorship or shutdown. This server aggressively defends against automated copying for any reason including offline viewing, duplication, etc... Please respect this requirement and DO NOT RIP THIS SITE. Questions?|
<A HREF="http://www.massmind.org/techref/noises.htm"> Avoiding Noise</A>
|Did you find what you needed?|
Welcome to massmind.org!
Welcome to www.massmind.org!